NVM Express® Modifications for I3C: Improved Out-of-Band Manageability of NVMe® SSDs
BlogBy: Myron Loewen, Platform Architect and NVM Express Board Member, Solidigm
To keep your data centers running optimally, you must have an out-of-band management port on each NVM Express® (NVMe®) SSD used to discover, configure, monitor and update each NVMe SSD attached to a platform regardless of your platform’s OS and health. Historically, this path has been achieved using PCI Express® (PCIe®) Vendor Defined Message over the NVMe SSD’s main PCIe bus or sideband using muxed SMBus technology. The faster solution is to manage NVMe SSDs using PCIe VDMs, but not all platforms have a PCIe VDM path or the PCIe bus may be unavailable due to PCIe link-down conditions. The sideband SMBus mux path is always available but can get maxed out by the ever-increasing size of firmware updates, security traffic and telemetry logs.
How is NVM Express helping to address these sideband security issues and bandwidth demands? We are pleased to introduce the NVMe technology modifications for Improved Inter Integrated Circuit (I3C). Our technical work groups created these modifications to improve sideband bandwidth, latency, robustness, security and efficiency for NVMe Management Interface (NVMe-MI™) technology, while also maintaining backwards compatibility with the SMBus interface. In this blog, I explore how I3C enhances sideband NVMe technology to make it your ideal data center storage sideband management path.
Boosting Data Center Efficiency and Performance with I3C
The NVMe modifications for I3C can help your data center support large sideband data transfers with increased bandwidth and lower latency compared to SMBus. 2-Wire is the new name for the sideband bus that combines I3C and SMBus functionality. I3C hubs are designed to be always connected, replacing SMBus muxes to allow the SSD to send out-of-band asynchronous event messages over the sideband interface at any time. This also permits all NVMe SSDs in your platform to do operations in parallel instead of the platform having to wait for each NVMe SSD to respond in its allotted SMBus mux window.
I3C hubs redrive the clock and data to improve signal integrity, eliminate packet loss from NVMe SSDs behind an SMBus mux and allow more NVMe SSDs to be serviced in a shorter time.
How I3C Addresses Modern Data Center Challenges
The most obvious challenge that NVMe modifications for I3C addresses in the enterprise and hyperscale data center market is that the higher sideband bandwidth will enable large data transfers to be completed faster than SMBus. For example, sideband firmware updates and large telemetry reads will take seconds instead of minutes. This bandwidth also allows sideband security to be improved with larger keys for post-quantum cryptography without impacting the platform’s time to ready.
But I think that the most significant improvement is the safe elimination of the SMBus muxes. Sideband safety and security are achieved by only allowing the platform to drive the clock signal, thus giving it complete control of the bus. The always-connected hub topology replaces SMBus muxes, which caused issues with signal integrity, packet retries, limited fan out and prevented device-initiated transactions in legacy architectures.
In addition, I3C can enhance your existing sideband architectures by:
- Allowing any NVMe SSD to report events immediately without the platform having to serially poll each one
- Embedding the I3C reset signal on the 2 wires so it is device-specific, fast and consistent for all form factors without requiring additional connector pins
- Assigning addresses dynamically to avoid needing databases of reserved addresses
- Simple broadcasting notifications to all NVMe SSDs because all NVMe SSDs are connected
- The hub maintains the ability from SMBus to physically locate which PCIe® port an NVMe SSD is plugged into and isolate rogue NVMe SSDs
As I3C adoption grows, we are excited to see it become the base for more development that continues to improve features like security, power loss notification, hot plug detection and platform redundancy.
Videos and More – Join NVM Express!
If you are interested in learning more about the I3C feature:
- Watch my NVM Express modifications for I3C video interview on the NVM Express YouTube channel
- View the modifications for I3C technical proposal (TP 6037) on our website’s Specifications page in the NVM Express Management Interface Specification, Revision 2.0 sub-category
We also invite our NVM Express member companies to join the NVM Express Technical Work Groups and the Management Interface Workgroup to support the development of this growing technology. If you are not currently a member of NVM Express, I encourage you to join our organization.