Yes. Many analysts show that there isn't a premium for NVMe technology over SATA or SAS SSDs due to a broad market, competition, multiple vendors and general availability. There is no reason users and companies should not be deploying NVMe architecture over other legacy storage protocols.
NVMe devices have been shipping since 2013, with the first NVMe SSDs in production from various NVM Express member companies. NVMe technology now makes up the majority share of SSDs sold in all markets
The NVMe Key Value (KV) Command Set has been standardized as one of the new I/O Command Sets that the NVMe specification supports. NVMe-KV allows access to data on an NVMe SSD controller using a key rather than a block address. The NVMe-KV Command Set provides the key to store a corresponding value on non-volatile [...]
The NVMe Zoned Namespaces (ZNS) interface is being developed by NVM Express. By dividing an NVMe namespace into zones, which are required to be sequentially written, ZNS offers essential benefits to hyper-scale organizations, all-flash array vendors and large storage-system vendors wishing to take advantage of storage devices optimized for sequential write workloads. ZNS reduces device-side [...]
An NVMe namespace is a quantity of non-volatile memory (NVM) that can be formatted into logical blocks. Namespaces are used when a storage virtual machine is configured with the NVMe protocol. One or more namespaces are provisioned and connected to an NVMe host. Each namespace can support various block sizes.
Multipathing, also called I/O multipathing, is the establishment of multiple physical routes between a server and the storage device that supports it. This is done to prevent Single Point of Failure and achieve continuous operations.
Persistent Memory Region (PMR) is an optinal area of persistent memory that is located on the NVMe device, that can be read with standard PCIe memory reads/writes. This could be extra DRAM that is power protected, storage class memory or other new memory types. The use cases are not defined by the NVMe specification, but [...]
Host Memory Buffer (HMB) is a low-level shared memory interface that can enable high-performance applications such as small payload control loops and large random access buffers.
NVM Sets is a logical construct that can divide an SSD up into multiple smaller NVM Sets that may be physically isolated from each other, for instance on NAND SSDs on a separate channel or number of NAND dice. This provides isolation and a solution to the noisy neighbor problem (writes from one workload impacting [...]
IO determinism defines a way for the SSD and the host to coordinate times for the SSD to do background garbage collection and conversely provide a deterministic window where the drive has the best read latency.