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Future of Memory and Storage (FMS) 2024 – NVM Express Presentation Track

NVM Express is proud to return as an organizational sponsor for the Future of Memory and Storage (FMS) 2024 at the Santa Clara Convention Center in Santa Clara, CA. We will be hosting a speaker track sharing updates and technical overviews of the latest NVM Express® (NVMe®) features including Live Migration, High Availability, Asynchronous Event Notification, Support for CXL® and more.

View the full presentation track agenda below:

Session 1: NVMe® 2.1 Specification Update, CXL Support and Windows Innovations

Session 1: NVMe® 2.1 Specification Update, CXL Support and Windows Innovations

  • Date: Wednesday, August 7
  • Time: 8:30 – 9:35 am PT
  • Location: Ballroom A, Floor 1
  • Presentations:
    • NVMe® 2.1 Specification Overview and SOTU
      • Speaker: Phil Cayton, Principal Engineer, Intel
      • About the Presentation: NVMe technology has become synonymous with high-performance storage and with widespread adoption in client, cloud, and enterprise applications. Although initially developed for direct-attached PCIe® SSDs, NVMe architecture is now widely used in both direct-attached and fabric-attached applications. This presentation provides an overview of the latest NVMe technologies, summarizes the NVMe standards roadmap, and describes new NVMe standardization initiatives.
    • NVM Express® (NVMe®) Support for CXL®
      • Speakers: Bill Martin, Principal Engineer SSD I/O Standards and NVM Express Board Member, Samsung Electronics; Jason Molgaard, Principal Storage Solutions Architect, Solidigm
      • About the Presentation: As CXL® becomes the memory interface protocol of choice, connecting CXL memory and NVMe Subsystem Local Memory (SLM) becomes critical. SLM allows access to memory on an NVMe device with NVMe commands. This memory is then used for the Computational Programs Command set. To improve performance and to enable new paradigms of Computational Programs, it is beneficial for the SLM to be able to be accessed using CXL. TP4184 is being developed to allow the mapping of SLM to the Host Physical Memory Address space using Host-Managed Device Memory (HDM) addressing. This presentation will bring you up to speed on where this development effort is.
    • NVMe® Innovations in Windows
      • Speaker: Scott Lee, Principal Software Engineer Manager, Microsoft
      • About the Presentation: The session will provide updates on Windows support of the NVMe family of specifications providing information on new features available and guidance to the industry on how best to work with some existing and new features planned in the areas of device power and device reliability.

What's New in NVMe Technology: Ratified Technical Proposals to Enable the Future of Storage

Session 2: NVMe® Live Migration & High Availability and Event Notification Features

  • Date: Wednesday, August 7
  • Time: 3:30 – 4:35 pm PT
  • Location: Ballroom A, Floor 1
  • Presentations:
    • NVM Express Standardization of Live Migration Panel
      • Speakers: Mike Allison, Sr. Director NAND Product Planning – Standards and Chair of the NVM Express Errata Task Group, Samsung Electronics; Klaus Jensen, Staff Engineer, Samsung Electronics; Nicolae Mogoreanu, Staff Software Engineer, Google; Lee Prewitt, Principal Program Manager Lead, Microsoft; Chaitanya Kulkarni, Technical Director, NVIDIA
      • About the Presentation: The NVM Express® Host Managed Live Migration presentation provided details of the NVMe® protocol defined the ratified TP4159 PCIe Infrastructure for Live Migration. This panel is going to expand the discussion on Live Migration to cover some of the customer use cases that drove the definition of the protocol. Also included is an overview of the available software stack supported.
    • Manageability Adds High Availability and Event Notification
      • Speakers: Myron Loewen, Platform Architect, Solidigm
      • About the Presentation: The NVMe-MI™ workgroup added new features for High Availability and Asynchronous Event notifications to the NVM Express® Management Interface Specification, Revision 1.3. This session will demonstrate how multiple BMCs can manage a dual-port NVMe® Storage Device via SMBus/I2C. It will also demonstrate how BMCs can subscribe to receive asynchronous event notifications from NVMe Storage Devices to avoid costly polling.

Schedule a Briefing: If you are a member of the press interested in learning more aboutthe latest NVM Express specification advancements, please contact nvme@nereus-worldwide.com.


August 6, 2024
August 8, 2024
Event Category:


Santa Clara Convention Center
5001 Great America Pkwy
Santa Clara, CA 95054 United States
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